1. Field of the Invention
The present invention relates to a method of forming a through hole in a silicon substrate.
2. Description of the Related Art
Formation of a through hole in a silicon substrate is widely used in a manufacturing process of a semiconductor device, a MEMS device, or the like. Further, in order to improve the performance of the semiconductor device or the MEMS device, formation of a through hole with higher dimensional accuracy is required.
FIG. 8 illustrates a general method of forming a through hole in a silicon substrate by dry etching.
FIG. 8 schematically illustrates a state of an etching process after an etching mask 3 is formed in advance on a front surface of a silicon substrate 1 and an etching stop layer 10 is formed in advance on a rear surface of the silicon substrate 1.
In this state, etching gas ions 11 are caused to enter the silicon substrate 1 from the front surface side thereof and the silicon substrate 1 is etched until the etching stop layer 10 is exposed to form through holes 6.
As the material of the etching stop layer 10, generally, a silicon oxide film which is an insulator is used. Further, taking into consideration the etching rate distribution within the plane of the silicon substrate, in a region in which the etching rate is high, it is necessary to carry out overetching even after the through hole is formed, and thus, the etching stop layer 10 continues to be exposed to the etching gas ions 11 all the while during the etching process for forming the through holes 6 and the overetching process. Therefore, the etching stop layer 10 is charged, and the trajectories of the etching gas ions 11 are deflected to cause notching 12, which is etching of side walls of the through holes 6. Further, the amount of charge of the etching stop layer has a distribution, with a result that the notching 12 is caused unevenly, and thus, there is a problem that the dimensional accuracy of the through holes 6 is deteriorated.
For the purpose of inhibiting the above-mentioned deterioration of the dimensional accuracy of the through holes, Japanese Patent Application Laid-Open No. 2004-237734 discloses a method of forming a through hole without notching by forming a hole in one surface of a silicon substrate and forming another hole by dry etching in the other surface of the silicon substrate so that the holes communicate with each other.
Further, Japanese Patent Application Laid-Open No. 2004-152967 discloses a method of preventing charge and inhibiting notching by forming an etching stop layer of a conductive material.
However, in the conventional structure disclosed in Japanese Patent Application Laid-Open No. 2004-237734, the positional accuracies of the holes in both surfaces of the substrate depend on the accuracy of an alignment device, and thus, there are cases in which the central axis of the hole in the one surface and the central axis of the another hole in the other surface are misaligned.
Further, in the conventional structure disclosed in Japanese Patent Application Laid-Open No. 2004-152967, metal is used as the material of the conductive etching stop layer, and thus, there is a possibility that a problem is caused by metal contamination in a post process. For example, in a bonding method called fusion bonding, it is known that minute metal contamination causes defective bonding.